1. Field of the Invention
The present invention relates to semiconductor integrated circuits. More specifically, the present invention relates to an integrated circuit assembly module that supports capacitive communication between semiconductor dies.
2. Related Art
Integrated circuit chips ordinarily communicate with one another through external wiring on a printed circuit board. In order to adapt the tiny dimensions of the integrated circuit to the larger dimensions of the wires on the printed circuit board, the integrated circuit is typically mounted in a “package” made of plastic or ceramic.
Integral to the package are a set of metal conductors, one for each connection to the integrated circuit. These metal conductors are typically connected to the integrated circuit via gold or aluminum “bonding wires.” These bonding wires are typically 25 microns in diameter, and are attached to “bonding pads” on the integrated circuit that typically measure 100 microns square. The other end of the bonding wires are attached to metal conductors that range from 200 to 500 microns in size, with the larger ends attached to a printed circuit board. In order for signals to travel from one integrated circuit to another, they must past through several sets of drivers to drive the signal over increasingly larger areas.
As the trend towards smaller and smaller integrated circuits with increasing numbers of transistors continues, limited communications paths on to and off of the chip are quickly becoming a major bottleneck to processor performance. Because advances in packaging technologies have not kept pace with increasing semiconductor integration densities, inter-chip communication bandwidth has not kept pace with on-chip computational power. Moreover, as feature sizes continue to decrease, the delay for communications off of the chip has increased, because more time is required to amplify small on-chip signal lines to drive large bonding pads.
Hence, what is needed is a method and an apparatus for communicating between semiconductor chips in a manner that reduces the amount of space and power required for the communication process.